1. Parthasarathy, A., & Rakheja, S. (2018). Reversal Time of Jump-Noise Dynamics for Large Nucleation. arXiv preprint. (arXiv: 1807.09922)

  2. Kani, N., Rakheja, S., & Naeemi, A. (2018). Analytic modeling of dipolar field requirements for robust coupling in a non-identical biaxial two-magnet system. Journal of Applied Physics, 124(2), 023901. (doi: 10.1063/1.5024821)

  3. Farzaneh, S. M., & Rakheja, S. (2018). Spin relaxation due to the D’yakonov-Perel’ mechanism in 2D semiconductors with an elliptic band structure. arXiv preprint.(arXiv: 1806.09488)

  4. Parthasarathy, A., & Rakheja, S. (2018). Reversal time of jump-noise magnetization dynamics in nanomagnets via Monte Carlo simulations. Journal of Applied Physics, 123(22), 223901. (doi: 10.1063/1.5025691)

  5. Li, K., & Rakheja, S. (2018). An analytic current-voltage model for quasi-ballistic III-nitride high electron mobility transistors. Journal of Applied Physics, 123(18), 184501. (doi: 10.1063/1.5025339)

  6. Patnaik, S., Rangarajan, N., Knechtel, J., Sinanoglu, O., & Rakheja, S. (2018, March). Advancing hardware security using polymorphic and stochastic spin-hall effect devices. In Design, Automation & Test in Europe Conference & Exhibition (DATE), 2018 (pp. 97-102). IEEE. (doi: 10.23919/DATE.2018.8341986)

  7. Rakheja, S., Flattè, M. E., & Kent, A. D. (2018). Voltage-Controlled Topological-Spin Switch for Ultra-Low-Energy Computing–Performance Modeling and Benchmarking. arXiv preprint. (arXiv: 1802.07893)

  8. Li, K., & Rakheja, S. (2018). Analytic Modeling of Nonlinear Current Conduction in Access Regions of III-Nitride HEMTs. MRS Advances, 1-6. (doi: 10.1557/adv.2017.632)


  1. Rakheja, S. (2017). Terahertz Band Communication Using Plasma Wave Propagation in Multilayer Graphene Heterostructures. IET Cyber-Physical Systems: Theory & Applications. (doi: 10.1049/iet-cps.2017.0073)

  2. Farzaneh, S. M., & Rakheja, S. (2017). Voltage tunable plasmon propagation in dual gated bilayer graphene. Journal of Applied Physics, 122(15), 153101. (doi: 10.1063/1.5007713)

  3. Rakheja, S., & Li, K. (2017, October). Graphene-based plasma wave interconnects for on-chip communication in the terahertz band. In Energy Efficient Electronic Systems & Steep Transistors Workshop (E3S), 2017 Fifth Berkeley Symposium on (pp. 1-3). IEEE. (doi: 10.1109/E3S.2017.8246185)

  4. Sengupta, P., & Rakheja, S. (2017). Anisotropy-driven quantum capacitance in multi-layered black phosphorus. Applied Physics Letters, 111(16), 161902. (doi: 10.1063/1.4999380)

  5. Yarmoghaddam, E., & Rakheja, S. (2017). Dispersion characteristics of THz surface plasmons in nonlinear graphene-based parallel-plate waveguide with Kerr-type core dielectric. Journal of Applied Physics, 122(8), 083101. (doi: 10.1063/1.4991674)

  6. Rakheja, S., & Kani, N. (2017, July). Polymorphic spintronic logic gates for hardware security primitives—Device design and performance benchmarking. In 2017 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH) (pp. 131-132). IEEE. (doi: 10.1109/NANOARCH.2017.8053726)

  7. Rangarajan, N., Parthasarathy, A., & Rakheja, S. (2017). A spin-based true random number generator exploiting the stochastic precessional switching of nanomagnets. Journal of Applied Physics, 121(22), 223905. (doi: 10.1063/1.4985702)

  8. Kani, N., Naeemi, A., & Rakheja, S. (2017). Non-monotonic probability of thermal reversal in thin-film biaxial nanomagnets with small energy barriers. AIP Advances, 7(5), 056006. (doi: 10.1063/1.4974017)

  9. Rakheja, S., & Kani, N. (2017). Spin pumping driven auto-oscillator for phase-encoded logic—device design and material requirements. AIP Advances, 7(5), 055905. (doi: 10.1063/1.4973390)

  10. Rangarajan, N., Parthasarthy, A., Kani, N., & Rakheja, S. (2017, April). Voltage-tunable stochastic computing with magnetic bits. In Magnetics Conference (INTERMAG), 2017 IEEE International (pp. 1-2). IEEE. (doi: 10.1109/INTMAG.2017.8008050)

  11. Rangarajan, N., Parthasarathy, A., Kani, N., & Rakheja, S. (2017). Energy-Efficient Computing with Probabilistic Magnetic Bits–Performance Modeling and Comparison against Probabilistic CMOS Logic. IEEE Transactions on Magnetics. (doi: 10.1109/TMAG.2017.2696041)

  12. Rakheja, S. (2017, March). Communication limits of on-chip graphene plasmonic interconnects. In Quality Electronic Design (ISQED), 2017 18th International Symposium on (pp. 45-51). IEEE. (doi: 10.1109/ISQED.2017.7918291)

  13. Pujari, R., & Rakheja, S. (2017, March). Performance evaluation of copper and graphene nanoribbons in 2-D NoC structures. In Quality Electronic Design (ISQED), 2017 18th International Symposium on (pp. 353-359). IEEE. (doi: 10.1109/ISQED.2017.7918341)

  14. Li, K., & Rakheja, S. (2017, February). Optimal III-nitride HEMTs–From Materials and Device Design to Compact model of the 2DEG Charge Density. In Proc. of SPIE Vol (Vol. 10104, pp. 1010418-1). (doi: 10.1117/12.2251582)


  1. Rakheja, S. (2016). On the Gaussian Pulse Propagation Through Multilayer Graphene Plasmonic Waveguides—Impact of Electrostatic Screening and Frequency Dispersion on Group Velocity and Pulse Distortion. IEEE Transactions on Nanotechnology, 15(6), 936-946. (doi: 10.1109/TNANO.2016.2613820)

  2. Kani, N., Rakheja, S., & Naeemi, A. (2016). A probability-density function approach to capture the stochastic dynamics of the nanomagnet and impact on circuit performance. IEEE Transactions on Electron Devices, 63(10), 4119-4126. (doi: 10.1109/TED.2016.2594170)

  3. Ament, S., Rangarajan, N., & Rakheja, S. (2016). A practical guide to solving the stochastic Landau-Lifshitz-Gilbert-Slonczewski equation for macrospin dynamics. arXiv preprint arXiv:1607.04596. (arXiv: 1607.04596)

  4. Rakheja, S., & Sengupta, P. (2016). The tuning of light-matter coupling and dichroism in graphene for enhanced absorption: Implications for graphene-based optical absorption devices. Journal of Physics D: Applied Physics, 49(11), 115106. (doi: 10.1088/0022-3727/49/11/115106)

  5. Rakheja, S., & Sengupta, P. (2016). Gate-Voltage Tunability of Plasmons in Single-Layer Graphene Structures—Analytical Description, Impact of Interface States, and Concepts for Terahertz Devices. IEEE Transactions on Nanotechnology, 15(1), 113-121. (doi: 10.1109/TNANO.2015.2507142)


  1. Sengupta, P., Rakheja, S., & Bellotti, E. (2015). The optical response of mono-layer transition metal dichalcogenides in a Kerr-type non-linear dielectric environment. arXiv preprint arXiv:1512.06734. (arXiv: 1512.06734)

  2. Rakheja, S., & Antoniadis, D. (2015, December). Physics-based compact modeling of charge transport in nanoscale electronic devices. In Electron Devices Meeting (IEDM), 2015 IEEE International (pp. 28-6). IEEE. (doi: 10.1109/IEDM.2015.7409790)

  3. Rakheja, S. (2015, September). Engineering plasmons in graphene nanostructures in THz frequencies: Compact modeling and performance analysis for on-chip interconnects. In Simulation of Semiconductor Processes and Devices (SISPAD), 2015 International Conference on (pp. 165-168). IEEE. (doi: 10.1109/SISPAD.2015.7292285)

  4. Rakheja, S., Lundstrom, M. S., & Antoniadis, D. A. (2015). An improved virtual-source-based transport model for quasi-ballistic transistors—Part II: Experimental verification. IEEE Transactions on Electron Devices, 62(9), 2794-2801. (doi: 10.1109/TED.2015.2457872)

  5. Rakheja, S., Lundstrom, M. S., & Antoniadis, D. A. (2015). An improved virtual-source-based transport model for quasi-ballistic transistors—Part I: Capturing effects of carrier degeneracy, drain-bias dependence of gate capacitance, and nonlinear channel-access resistance. IEEE Transactions on Electron Devices, 62(9), 2786-2793. (doi: 10.1109/TED.2015.2457781)

  6. Yu, L., El-Damak, D., Ha, S., Rakheja, S., Ling, X., Kong, J., ... & Palacios, T. (2015, June). MoS 2 FET fabrication and modeling for large-scale flexible electronics. In VLSI Technology (VLSI Technology), 2015 Symposium on (pp. T144-T145). IEEE. (doi: 10.1109/VLSIT.2015.7223655)

  7. Rakheja, S., & Sengupta, P. (2015, June). Tunability of optical absorption in a heterostructure with an embedded graphene sliver. In Device Research Conference (DRC), 2015 73rd Annual (pp. 143-144). IEEE. (doi: 0.1109/DRC.2015.7175596)

  8. Rakheja, S., Ceyhan, A., & Naeemi, A. (2015). 15 Interconnect considerations. CMOS and Beyond: Logic Switches for Terascale Integrated Circuits, 381. (doi: 10.1017/CBO9781107337886.021)


  1. Rakheja, S., Lundstrom, M., & Antoniadis, D. (2014, December). A physics-based compact model for FETs from diffusive to ballistic carrier transport regimes. In Electron Devices Meeting (IEDM), 2014 IEEE International (pp. 35-1). IEEE. (doi: 10.1109/IEDM.2014.7047172)

  2. Rakheja, S., Wu, Y., Wang, H., Palacios, T., Avouris, P., & Antoniadis, D. A. (2014). An ambipolar virtual-source-based charge-current compact model for nanoscale graphene transistors. IEEE Transactions on Nanotechnology, 13(5), 1005-1013. (doi: 10.1109/TNANO.2014.2344437)

  3. Rakheja, S., & Sengupta, P. (2014, June). Graphene nanoribbon plasmonic waveguides: Fundamental limits and device implications. In Device Research Conference (DRC), 2014 72nd Annual (pp. 105-106). IEEE. (doi: 10.1109/DRC.2014.6872319)

  4. Naeemi, A., Ceyhan, A., Kumar, V., Pan, C., Iraei, R. M., & Rakheja, S. (2014, June). BEOL scaling limits and next generation technology prospects. In Proceedings of the 51st Annual Design Automation Conference (pp. 1-6). ACM. (doi: 10.1145/2593069.2596672)

  5. Bonhomme, P., Manipatruni, S., Iraei, R. M., Rakheja, S., Chang, S. C., Nikonov, D. E., ... & Naeemi, A. (2014). Circuit simulation of magnetization dynamics and spin transport. IEEE Transactions on Electron Devices, 61(5), 1553-1560. (doi: 10.1109/TED.2014.2305987)


  1. Rakheja, S., Wang, H., Palacios, T., Meric, I., Shepard, K., & Antoniadis, D. (2013, December). A unified charge-current compact model for ambipolar operation in quasi-ballistic graphene transistors: Experimental verification and circuit-analysis demonstration. In Electron Devices Meeting (IEDM), 2013 IEEE International (pp. 5-5). IEEE. (doi: 10.1109/IEDM.2013.6724568)

  2. Rakheja, S., Chang, S. C., & Naeemi, A. (2013). Impact of dimensional scaling and size effects on spin transport in copper and aluminum interconnects. IEEE Transactions on Electron Devices, 60(11), 3913-3919. (doi: 10.1109/TED.2013.2282615)

  3. Rakheja, S., & Naeemi, A. (2013). Roles of doping, temperature, and electric field on spin transport through semiconducting channels in spin valves. IEEE Transactions on Nanotechnology, 12(5), 796-805. (doi: 10.1109/TNANO.2013.2274494)

  4. Kumar, V., Rakheja, S., & Naeemi, A. (2013, August). Review of multi-layer graphene nanoribbons for on-chip interconnect applications. In Electromagnetic Compatibility (EMC), 2013 IEEE International Symposium on (pp. 528-533). IEEE. (doi: 10.1109/ISEMC.2013.6670470)

  5. Rakheja, S., Kumar, V., & Naeemi, A. (2013). Evaluation of the potential performance of graphene nanoribbons as on-chip interconnects. Proceedings of the IEEE, 101(7), 1740-1765. (doi: 10.1109/JPROC.2013.2260235)

  6. Rakheja, S., Kumar, V., & Naeemi, A. (2013, June). Performance modeling for interconnects for conventional and emerging switches. In System Level Interconnect Prediction (SLIP), 2013 ACM/IEEE International Workshop on (pp. 1-9). IEEE. (doi: 10.1109/SLIP.2013.6681683)

  7. Rakheja, S., & Naeemi, A. (2013). Communicating Novel Computational State Variables: Post-CMOS Logic. IEEE Nanotechnology Magazine, 7(1), 15-23. (doi: 10.1109/MNANO.2012.2237314)


  1. Kumar, V., Rakheja, S., & Naeemi, A. (2012). Performance and energy-per-bit modeling of multilayer graphene nanoribbon conductors. IEEE transactions on electron devices, 59(10), 2753-2761. (doi: 10.1109/TED.2012.2208753)

  2. Rakheja, S., & Naeemi, A. (2012, August). Compact modeling of spin-transport parameters in semiconducting channels in non-local spin-torque devices. In Nanotechnology (IEEE-NANO), 2012 12th IEEE Conference on (pp. 1-6). IEEE. (doi: 10.1109/NANO.2012.6321912)

  3. Rakheja, S., & Kumar, V. (2012, March). Comparison of electrical, optical and plasmonic on-chip interconnects based on delay and energy considerations. In Quality Electronic Design (ISQED), 2012 13th International Symposium on (pp. 732-739). IEEE. (doi: 10.1109/ISQED.2012.6187573)

  4. Rakheja, S., & Naeemi, A. (2012, March). Interconnect analysis in spin-torque devices: Performance modeling, sptimal repeater insertion, and circuit-size limits. In Quality Electronic Design (ISQED), 2012 13th International Symposium on (pp. 283-290). IEEE. (doi: 10.1109/ISQED.2012.6187507)

  5. Rakheja, S., & Naeemi, A. (2012). Transport of Novel State Variables. In Graphene Nanoelectronics (pp. 113-136). Springer, Boston, MA. (doi: 10.1007/978-1-4614-0548-1_5)

  6. Rakheja, S., & Naeemi, A. (2012). Graphene nanoribbon spin interconnects for nonlocal spin-torque circuits: Comparison of performance and energy per bit with CMOS interconnects. IEEE Transactions on Electron Devices, 59(1), 51-59. (doi: 10.1109/TED.2011.21711865)


  1. Rakheja, S., & Naeemi, A. (2011, August). On physical limits and challenges of interconnects for spin devices. In Nanotechnology (IEEE-NANO), 2011 11th IEEE Conference on (pp. 1389-1394). IEEE. (doi: 10.1109/NANO.2011.6144321)

  2. Rakheja, S., & Naeemi, A. (2011). Modeling interconnects for post-CMOS devices and comparison with copper interconnects. IEEE Transactions on Electron Devices, 58(5), 1319-1328. (doi: 10.1109/TED.2011.2109004)

  3. Kumar, V., Rakheja, S., & Naeemi, A. (2011, May). Modeling and optimization for multi-layer graphene nanoribbon conductors. In Interconnect Technology Conference and 2011 Materials for Advanced Metallization (IITC/MAM), 2011 IEEE International (pp. 1-3). IEEE. (doi: 10.1109/IITC.2011.5940340)

  4. Rakheja, S., & Naeemi, A. (2011, May). Interconnect performance and energy-per-bit for post-CMOS logic circuits: Modeling, analysis, and comparison with CMOS logic. In Interconnect Technology Conference and 2011 Materials for Advanced Metallization (IITC/MAM), 2011 IEEE International (pp. 1-3). IEEE.  (doi: 10.1109/IITC.2011.5940267)

  5. Rakheja, S., & Naeemi, A. (2011, March). Interconnection aspects of spin torque devices: Delay, energy-per-bit, and circuit size modeling. In Quality Electronic Design (ISQED), 2011 12th International Symposium on (pp. 1-9). IEEE.  (doi: 10.1109/ISQED.2011.5770811)


  1. Rakheja, S., & Naeemi, A. (2010). Interconnects for novel state variables: Performance modeling and device and circuit implications. IEEE Transactions on Electron Devices, 57(10), 2711-2718. (doi: 10.1109/TED.2010.2062186)

  2. Rakheja, S., Naeemi, A., & Meindl, J. D. (2010, June). Physical limitations on delay and energy dissipation of interconnects for post-CMOS devices. In Interconnect Technology Conference (IITC), 2010 International (pp. 1-3). IEEE. (doi: 10.1109/IITC.2010.5510448)